n2ktoc - need to know Table of Contents

last updated 13 nov 97 - mjh

This document is intended to provide some insight as to what you need to know in order to get electronics designed around the High Energy Physics Group at the University of Illinois. Some of it is purely local (who, what, where); some is engineering practice, and some is pure fiction. But if you hope to succeed, you need to know...

THIS IS A LIVING DOCUMENT !

As we evolve our way of doing things, and as we come to identify other categories of critical information, this document will change. So don't read this from front to back and say "done!" Instead, come back here from time to time to look for changes; there is a What's New list to help identify what may have changed since the last time you read this.

Topics

1) engineering resources
1.1) databooks and vendor files
1.1.1) our nonlending policy
1.1.2) labels
1.1.2.1) current
1.1.2.2) old
1.1.3) shelves
1.1.3.1) silicon
1.1.3.2) non silicon
1.1.3.3) standards
1.1.3.4) conferences
1.1.3.5) publications
1.1.3.6) books
1.1.4) file cabinets
1.1.5) CD's
1.2) online databases
1.2.1) catalog
1.2.2) vendor index
1.2.3) hall cabinet list

2) engineering documentation (records)
2.1) naming
2.2) documentation
2.2.1) online
2.2.2) archived (offline)
2.2.3) file cabinets
2.2.4) flat files
2.2.5) 3 ring notebooks
2.2.6) the top shelves...
2.3) a rough history of time (experiments)
2.4) a rough history of time (standards)

3) project planning
3.1) scheduling
3.2) cost estimation
3.3) resources

4) computer aided engineering
4.1) tools
4.1.1) what we have, where
4.1.2) access to the software
4.1.3) documentation
4.1.4) support

4.2) process flows
4.2.1) overall process flow
4.2.2) symbol creation process flow
4.2.3) pdb creation process flow
4.2.4) cell creation process flow
4.2.5) seed creation process flow

4.3) schematic capture
4.3.1) seed projects
4.3.2) files, pages, folders
4.3.2.1) veribest.cfg
4.3.2.2) [project].prj
4.3.2.3) [project].sbk
4.3.2.4) [project].cdb
4.3.2.5) hdl, genhdl
4.3.2.6) pld, altera, xilinx, etc.
4.3.2.7) BOM
4.3.2.8) pdb_src
4.3.2.9) pcb
4.3.2.10) pcb_fab
4.3.3) style issues
4.3.4) tool impositions
4.3.5) symbol creation

4.4) packaging
4.4.1) selection considerations
4.4.1.1) favorite parts list(s)
4.4.1.1.1) resistors
4.4.1.1.2) capacitors
4.4.1.1.3) diodes
4.4.1.1.4) LEDs and optoisolators
4.4.1.1.5) BJTs
4.4.1.1.6) FETs
4.4.1.1.7) op amps and linear devices in general
4.4.1.1.8) logic families
4.4.1.1.9) small programmables (PLDs)
4.4.1.1.10) large programmables (FPGAs)
4.4.1.1.11) microcontrollers
4.4.1.1.12) RAM and PROMs
4.4.1.1.13) sockets and adapters
4.4.1.1.14) connectors
4.4.1.1.14) hardware (nuts and bolts...)
4.4.1.2) the DigiKey metric
4.4.1.3) package styles
4.4.2) pdb creation/editing
4.4.2.1) pdb entries for programmable devices
4.4.3) ordering parts (preliminary)

4.5) simulation
4.5.1) models
4.5.2) stimulus and testbenches
4.5.3) documentation

4.6) layout
4.6.1) seed projects
4.6.1.1) layer assignment
4.6.1.2) pins and pads
4.6.1.3) aperture list
4.6.1.4) drill table
4.6.2) outlines
4.6.2.1) board outline
4.6.2.2) route border
4.6.2.3) the other route border (nc-route)
4.6.3) cell creation
4.6.3.1) current cell list
4.6.4) placement considerations
4.6.4.1) see the grid, feel the grid, be the grid...
4.6.5) routing
4.6.5.1) via grid = 0.05
4.6.5.2) route grid (?)
4.6.5.3) placement/autoroute philosophy
4.6.6) post-route clean-up
4.6.7) pads processing
4.6.8) power planes
4.6.9) mask layers
4.6.10) silk screen
4.6.11) drill map
4.6.12) assembly drawings
4.6.13) photoplotting
4.6.14) fabrication
4.6.14.1) files
4.6.14.2) vendors
4.6.14.3) testing?
4.6.14.4) proof reading the films
4.6.14.5) examining the delivered boards

4.7) Done
4.7.1) A symbol is done when...
4.7.2) A schematic is done when...
4.7.3) A design is done when...
4.7.4) A simulation is done when...
4.7.5) A layout is done when...
4.7.6) A project is done when...

5) ordering parts
5.1) parts on hand
5.1.1) Todd's shop
5.1.2) Harold's shop
5.1.3) hall closets and cabinets, etc.
5.2) sources, alternatives
5.2.1) today = RadioShack, Klaus
5.2.2) tomorrow = DigiKey, JDR
5.2.3) soon = Arrow, Hamilton, Newark, etc.
5.3) who pays...

6) assembly
6.1) in house
6.1.1) yourself
6.1.2) Harold, Neil, and/or PES support
6.1.3) armies of students...
6.2) contract

7) programmable devices
7.1) programming PLDs
7.1.1) DataI/O programmer
7.2) programming FPGAs
7.2.1) Altera programmer
7.2.2) Bit-Blaster, Xchecker
7.3) programming PROMs
7.4) programming (for) microcontrollers

8) testing
8.1) the test stand
8.2) LE modules
8.3) the future of VME and/or IP's

9) service
9.1) testing
9.2) repairing
9.2.1) desoldering
9.3) cleaning
9.4) calibration
9.5) record keeping (especially phototube bases)

Glossary