We maintain the engineering drawings, notes, files, artwork, etc. for all of our past engineering projects in 457 Loomis Lab. This information is kept in several forms, in a few different places. This section provides some insight as to what is where.
But before we can discuss where, we need to discuss names...
The identification of projects come from a long-standing
naming scheme, the root of which is as follows:
This information can also be found in indices\drawings_key.txt which is one of the original index files.
By way of explanation, the "B" suffix mostly means bare pc board, the "C"
suffix mostly means circuit diagram, and the "M" suffix mostly means
mechanical. The most commonly used categories are:
In terms of project names, FASTBUS boards are mostly known by their (short) name and module number. LE boards are known by their bare-board number, but assembled modules are know by their front-panel name. VME modules are know variously by their short name and/or index number. XE modules are know by their circuit number. No, its not you; this *is* confusing.
This system evolved over a rather long period of time, and different
design families attempted to maintain their unique naming scheme.
The "official" index files, which identify the names are:
Some degree of reconciliation is in progress. Since VME and XE are the most common designs today, the following naming conventions are being attempted:
VME boards are more problematic, since they are typically sophisticated design projects that resist nice clean categories. For identification purposes, they are know primarily by number, and secondarily by name. Thus VME029 is the name of the 29th VME board design, DFC (data flow control) is the nickname, and 029_DFC is the name shown on all related documentation so as to encode both pieces of information. VME029B is the corresponding bare pc board. VME029P would be an assembled, tested, ready-to-go module employed in the context of a larger system. The name "VME029C" should refer to the schematic, but we tend not to use this formalism in favor of simply "VME029" or "DFC". It is important to remember, however, that "DFC" is not really an adequate name for this design. It is easy to imagine designing a dual-floating-counter (or whatever) some time in the future. Therefore, while the DFC nickname is fine for casual use, no formal document should ever be labeled "DFC". All documents should be labeled either VME029, or 029_DFC.
Another side of the naming issue is the assignment of Illinois Part Numbers (IPNs). In order to track components, we assign an in-house part number to "each" component type. These are equivalence classes, so a 74LS00 is labeled the same, regardless of whether it was manufactured by Texas Instruments or National Semi, etc. Since bare boards, and assembled/finished boards can be used as "components" in other design projects, they require IPNs. The name encoding rules can be found in docs\indexcat.txt under the printed circuit category (PC). See also the discussion of the (1.2.1) online catalog where such "parts" are tracked.
Engineering information is located in a diverse number of locations and forms in 457 Loomis. The most common locations are described below.
However, please keep in mind that there is no librarian. Fundamentally, *you* are responsible for providing documentation for your project, and placing that information where it can be found. The following is a guide for what belongs where:
For most design work performed after 1985, we have been using computer aided engineering tools, initially Daisy Systems schematic capture and Calay Systems printed circuit board layout. Neither of these companies exist today. Daisy bought Cadnetix and became Dazix, went bankrupt, was bought by Intergraph, which later spun it off as VeriBest. Calay, on the other hand, was devoured by another company, and essentially died.
As a result of passing through many hands, our design information is in many differing formats. The two most significant are: Sun-based Intergraph design data (schematics, pc boards, and simulation stuff) and NT-based VeriBest design data (schematics, pc boards, and simulation). It is intended that all design data eventually migrate to the NT boxes, and converted to VeriBest in the process. The road to hell is paved with such intentions...
Thus, in looking for a design on-line, if the design is older
than 1996, start on the Suns. The primary directories to examine are:
/home/plus/[fb,le,vme,xe]/[project_number]/... and eng4:/home/job/[project_name]/...The structures should be fairly self evident. Some degree of familiarity with the tools is required to appreciate what is what. In simple terms, /home/plus contains the schematics and simulation on a large shared disk, whereas /home/job is unique to eng4 and contains (mostly) the pc board specific stuff.
For new jobs and future jobs, look on the NT boxes, under:
J:\[experiment_name]\[project_name]\... and J:\archive\[fb,le,vme,xe]\[project_name]\...The structure in \archive is similar to the Sun /home/plus structure; the important difference is that the projects in \archive contain *all* of the information related to the project (unlike /home/job for pcb-only)
Since this the online information is the most useful starting point for either understanding the design, or reusing pieces for future designs, it is important that the online information be as complete as possible. This includes details as to Engineering Changes (ECO's), Bill of Material lists, support code for microcontrollers, configuration files for programmable devices, etc.
In short, everything.
Some day we will effectively archive our on-line design data. This will happen the day after we get "caught up" with our current work :-)
At present, we have some 8mm data tapes in the basement that represent raw backups of the Sun-based data. You need to talk to David Lesny about NT backups.
The hope is to get all of the design data on the NT boxes, and from there onto JAZ cartridges and/or to cut a CDROM ("greatest hits"). Someday...
Regardless of the promise of the "paperless office" we maintain a fair paper trail. There are a series of file cabinets, with hanging files, for LE and (smaller) XE projects. These files should contain schematics, artwork, and all important paperwork.
For design projects that will not fit in conventional hanging files, we have a series of flat file drawers. These contain predominantly FB, VME, and XE (larger) projects, as well as various mechanical projects (drawings).
However, when you really get down to it, the "best" documentation for any project is probably in the project-specific 3-ring notebook(s). This is where all of the real dirt is kept, including hand-written notes, blood-stained sketches, expressions of remorse, etc. We (engineers) each keep our 3-ring notebooks. We try to keep the hanging files and flat files up to date. We try to keep the on-line design data up to date.
And our children will curse our sloppiness, when someday in the future they try to "resurrect" an old design, and all that can be found is the online (offline) archive and the hanging/flat files. Take pity on your descendents, oh designers, for they shall wail and gnash their teeth because you *should* have updated the "public" record of your designs, but did not.
For experiments that are long since past, a less-than-organized collection of information is kept on the upper shelves in 457. If you need something from here, prepare to engage in technological archeology.
The next two sections ( (2.3) a rough history of time (experiments) and (2.4) a rough history of time (standards)) may put some perspective on what can be found on the top shelves.
The purpose of this section is to describe (casually) the engineering projects undertaken by the High Energy Physics Group, and where hardware/software/documentation may be found.
Perp: unknown
Location: unknown
Description: film-based
Hardware: gone
Documentation: gone
Perp: unknown
Location: Brookhaven
Description: film-based
Hardware: gone
Documentation: gone
Perp: unknown
Location: unknown
Description:
Hardware: gone
Documentation:
i) book by student (who? where?)
ii) drawings (some): flat-file on southwest upper shelf
iii) drawing index book: southwest upper shelf
iv) notebook: southwest upper shelf
v) drawer of docs: southwest upper shelf
Perp: unknown
Location: UofI
Description: film-digitizer
Hardware: essentially gone. Some electronics remain, most notably:
i) high precision/high current D-A converters (where?),
ii) some optics (hall closets; which?)
Documentation:
i) two drawers of docs: southwest upper shelf
ii) two rolls of drawings: southwest upper shelf
iii) engineering test data: southwest upper shelf
Perp: unknown
Location: Brookhaven
Description: a lesson in how to bond to silicon...
Hardware: Allan Bross (Fermi) may have some
Documentation: (I saw something about CCDs while cleaning up...?)
Perp: unknown
Location: Fermi
Description: unknown
Hardware: unknown
Documentation: unknown
Perp: Uli Kruse
Location: unknown
Description: chambers, DAQ electronics
Hardware: unknown
Documentation: unknown
Perp: Tom Kirk
Location: unknown
Description: unknown
Hardware: unknown
Documentation: unknown
Perp: unknown
Location: Fermi
Description:
i) wire proportional chambers
ii) the origin of the black box (BBX; LE modules)
iii) first experiment to use solid state memory
as a data-staging area. This involved substantial interaction with Intel.
iv) first to use Hamming code on memory (developed?)
v) add-in memory for DEC KA-10 (?), with ECC logged by the computer itself
Hardware: unknown
Documentation:
i) BBX documentation - unknown
ii) other - unknown
Perp: unknown
Location: Fermi
Description: unknown
Hardware: unknown
Documentation: unknown
Perp: unknown
Location: Fermi
Description:
i) unique light-guides for multi-ton detector
ii) aluminum castings, rectangular canted to round, lined with AlZac
Hardware: unknown
Documentation: unknown
Perp: Larry Cardman
Location: NPL
Description:
i) position sensors, using extremely small (1/16" thick) scintillator strips
ii) mechanical design work
iii) BBX modules for machine control, DAQ, odd jobs
Hardware: unknown
Documentation: unknown
Perp: unknown
Location: Fermi
Description:
i) UofI has been involved in CDF since day-one
ii) central muon trigger
iii) outer muon chambers
iv) high voltage ?
Hardware: unknown
Documentation: unknown
Perp: Al Wattenburg
Location: SLAC
Description: unknown
Hardware: unknown
Documentation: unknown
Perp: Al Wattenburg
Location: SLAC
Description: unknown
Hardware: unknown
Documentation: unknown
Perp: unknown
Location: SLAC
Description:
i) muon system
ii) mechanical design
iii) electrical design
Hardware: unknown
Documentation:
i) two drawers of docs: southwest upper shelf
ii) random drawings: southwest upper shelf
iii) random notebooks: southwest upper shelf
Perp: Bob Downing, Mike Haney, Jack Hoeflich
Location: SLAC
Description:
i) rack power monitoring
ii) fire system
iii) DAQ infrastructure
iv) trigger elements: DCTR, WSM
Hardware: in service at SLAC
Documentation:
Perp: Tom O'Halloran, Bob Downing
Location: Dugway Proving Grounds
Description:
i) grain bin mechanics
ii) omatidial board assembly
Hardware: unknown
Documentation:
i) (filing system numbers?)
ii) other ?
Perp: Mike Haney
Location: Cornell
Description: many channels of low-voltage, offset from earth by +/-50v, supervised and controlled by many HC11 microcontrollers.
Hardware: in service at Cornell :
i) XE33-C01 - power supply controller (PSUP)
ii) VME0004 - power distribution PDIST)
iii) VME0005 - VME-based communications controller (PCON)
Documentation: files on-line (Sun), hanging files, flat files, and 3-ring notebooks
Perp: Bob Downing, Mike Kasten, Vaidas Simaitis; Lee Holloway, Tony Liss
Location: Fermi
Description:
i) preamps for Lee
ii) preamps for Tony
iii) amplifier-shaper-discriminator (ASD2)
iv) trigger (XTRP)
v) infrastructure: subracks, safety, etc.
vi) other ?
Hardware: unknown
Documentation: unknown
Perp: Tim Bergfeld, Jesse Ernst, George Gollin, Mike Haney, Randal Hans, Ed Johnson, Charles Plager, Chris Sedlack, Mats Selen, Jeremy Williams
Location: Cornell
Description:
Hardware:
Documentation:
The purpose of this section is to describe (casually) what the engineers of the High Energy Physics Group have done in the name of establishing standards for the community, and where documentation may be found.
Perp: Bob Downing
Description:
Documentation:
Perp: Bob Downing
Description:
Documentation:
i) historic documents in notebooks southeast upper shelf
ii) unsorted documents in bottom-left slider near door
iii) published standards (books) on "Standards" bookshelf
iv) other?
Perp: Bob Downing
Description:
Documentation:
Perp: Mike Haney
Description: These are all standardization efforts that Mike has participated
in, typically at the review and balloting level (so as to minimize travel time
and expenses).
i) IEEE P1364 - standardization of the Verilog Hardware Description Language
ii) IEEE P1029.1 - Waveform and Vector Exchange Standard,
to describe simulation and testing
iii) IEEE P1076.2 - Standard VHDL Language Mathematical Package, adding real and complex
number to the VHDL hardware description language
iv) IEEE P1076.1 - Analog and Mixed Signal Extensions to VHDL, adding analog expression
to the VHDL hardware description language
v) VITA 23-199x VME for Physics Application (i.e. what Bob co-authored)
Documentation: mostly in the form of 3-ring notebooks, currently in Mike's possession, but eventually on the standards shelf.