Pipe FPGA: WPIPEE_X (ver. 10)

Documentation

  • wpipe_x_doc.txt - Pipe (wpipee_X) text file
  • pipe_data_flow.pdf - Pipe & Track FPGA Data Flow

    • Schematics
  • Schematic Page           Page Description
  • wpipee_x01.pdf - Address Decoding
  • wpipee_x02.pdf -XFT input & XFT sim mux
  • wpipee_x03.pdf - TRKLATx
  • wpipee_x04.pdf - SEGLATx
  • wpipee_x05.pdf - outputs to RAM Address
  • wpipee_x06.pdf - Exchange with Track FPGA
  • wpipee_x07.pdf - Sync checks & ADSC_L
  • wpipee_x08.pdf - I,R to RAM Address
  • wpipee_x09.pdf - Segment & L1Queue
  • wpipee_x10.pdf - Pipeline Controls
  • wpipee_x11.pdf - L2RAW
  • wpipee_x12.pdf - VME
  • wpipee_x13.pdf - VME
  • wpipee_x14.pdf - VME
  • wpipee_x15.pdf - L2 Readout
  • wpipee_x16.pdf - Token page
  • wpipee_x17.pdf - Error Detection & Processing

  • xftmux01.pdf - Macro: XFT Data & XFT Sim Mux
  • addrout01.pdf - Macro: VME Addr & XFT Data Mux
  • l1queue01.pdf - Macro: L1 Accept Queue
  • segpipe01.pdf - Macro: L1 Pipeline & L2 Buffer
  • segpipem01.pdf - Macro: L1 Pipeline & L2 Buffer
  • priority3_01.pdf - Macro: 3->1 Priority Logic